Introduction
AI factories’ growth continues at a pace of expansion that is pushing technology and the supply chain to its limits. Hyperscalers, neoclouds, and sovereign programs are committing hundreds of billions of dollars to GPUs and XPUs. Equipment spend is already moving through a trillion-dollar wave this decade. AI networking itself is on a path to exceed $300B this decade and approach $1T early next decade as scale-up, scale-out, and scale-across fabrics all expand. The constraint on how large GPU clusters and AI campuses can reach is not the accelerator. It is the fabric(s) that feed it.
Optical components play a key role in the network expansion. For example, indium phosphide is how the industry makes the lasers that turn electrical bits into light. Every optical interconnect in an AI cluster depends on it. The industry has treated InP as a component issue and shortage, which worked at telecom volumes. At AI volumes it is already a manufacturing and scale problem, and it gets harder with each new generation of interconnect. Until the manufacturing model changes, AI networking will keep running into the same wall.
The Bottlenecks Are Already Visible
AI networking has several bottlenecks at once. Switch radix is not rising as fast as cluster size. Copper reach collapses as SERDES moves to 224G and beyond. Pluggable optics add power, latency, and handling failures that compound in large fabrics. Scale-up domains want thousands of XPUs under a single switch tier. Scale-out wants flatter Ethernet fabrics with far more bandwidth per GPU than today’s designs deliver.
The industry is adapting. As an example, the OCP community is pushing both the hardware and the protocol side. ESUN is creating an open Ethernet for scale-up, and UALink offers an open alternative, so operators don’t lock into a proprietary interconnect per XPU/GPU. The industry can’t have 40 unique rack and interconnect designs for 40 different accelerators. Open framing, lossless behavior, and interoperable switch and NIC pipelines will take scale-up from single-rack to multi-rack in just a few years. Standards create volume, but it is wrong to assume the optics can be manufactured in volume and at a cost that the AI cluster can absorb.
Why Indium Phosphide Is the Hidden Constraint
Silicon photonics is excellent at routing light, but you cannot make a laser or amplifier with silicon. The industry still needs III-V materials to generate photons, and indium phosphide is the workhorse for the sources and amplifiers that make high-density optical links possible. The InP supply chain was built for telecom. It grew up on small wafers, discrete lasers, and volumes measured in ways that look nothing like AI factory demand. One hyperscaler’s monthly volume already exceeds all Telco volume in a whole year.
AI scale-up and co-packaged optics change the unit of demand. The industry does not need a modest number of lasers. It needs dense and eventual multi-wavelength sources that can sit next to XPUs and switches, and ship in the quantities that GPU attach implies. Discrete assembly and boutique III-V lines cannot be the answer at that scale. Yield, wavelength accuracy, and cost all break if each laser is still treated as a hand-built part.
This is the same class of problem the industry already lived through in compute. GPU demand forced a new manufacturing posture in advanced packaging and HBM. Networking has not made an equivalent move.
A New Manufacturing Paradigm Is Required
The industry needs to scale from millions to billions of lasers. It needs a different way to make networking optics at scale with a price that is not prohibitively expensive. The path that scales is the one that puts III-V where it is required and silicon photonics where it is strong, then runs that combination on commercial semiconductor lines. Heterogeneous Integration of silicon AND InP or other III-V materials is the only model that can take lasers from telecom economics to AI economics.
That means larger wafers, patterning wavelength control with the lithography tools the silicon industry already uses, and producing multi-wavelength sources as chips rather than assemblies. It also means designing the optical source for co-packaged and near-packaged architectures from the start, not retrofitting a pluggable supply chain into a legacy package. Standards like ESUN and UALink will set the rules for how scale-up fabrics behave. Foundry-class heterogeneous photonics will determine whether those architectures can be deployed at the volumes the forecast implies. The industry needs standards, XPU/GPU architectures, networking, and manufacturing to move together or risks AI factories shifting to the right.
Conclusion
AI networking will not miss its next decade because the industry ran out of ideas, the talent and technologies are there. It will miss it if the manufacturing model for optical interconnect stays stuck in the past. Indium phosphide is not a side component. It is one of the binding constraints on scale-up, CPO, NPO and the larger AI networking market. The large hyperscalers and frontier labs already know that compute without a commensurate network is compute left idle. The next requirement is just as clear. Networking itself needs a new manufacturing paradigm that can keep pace with the XPU/GPU pace it is supposed to serve.
