This morning, Marvell announced the second-generation Structera X 3406 and 3506 CXL 3.2 memory expanders — the industry’s first six-channel CXL memory expanders aimed at AI inference — as the OCP Global Summit gets under way in San Jose. The company also announced two new connectivity parts, the Alaska E 3.2T protocol-aware retimer and the second-generation Alaska A 1.6T AEC DSP, both now sampling. We think the two announcements belong in the same conversation: one attacks the memory wall inside the server, the other keeps 224G-per-lane signals intact across the boards, backplanes, and copper cables that tie AI racks together.
For memory, the numbers moved meaningfully. Structera X 3406 and 3506 add six DDR4/DDR5 memory channels, 50% more channels than the prior generation, with PCIe Gen 6 connectivity — up to 18 DDR4 RDIMM slots supporting 9TB for the 3406, and up to 12 DDR5 RDIMM slots supporting 6TB for the 3506. The controller connects to as many as four hosts over PCIe 6.0 x16 with up to 256GB/s of host bandwidth, and inline LZ4 compression throughput is up 5x versus the previous generation, up to 250GB/s. Marvell quantifies the payoff as up to 2–3x more effective memory capacity depending on workload, up to 40–50% faster time to first token at equivalent context length, or up to 2x longer supportable context windows at equivalent latency. For deep learning recommendation models, the company cites up to 2x higher queries per second and 2–3x more effective embedding-table capacity per controller. The parts demoed at the OCP Summit, and sampling is expected in Q1 2027, extending the Structera X 2404 and 2504 architecture already shipping to hyperscalers. The full release is on Marvell’s investor site.
On the wire side, the Alaska E 3.2T protocol-aware retimer delivers 3.2Tbps of aggregate bandwidth over 16 lanes of 224G PAM4 SerDes, with more than 45dB of insertion-loss compensation, broad protocol support across Ethernet, UALink, and ESUN, and reduced latency for scale-up links — Marvell positions it for XPU-to-XPU and XPU-to-switch architectures as switch silicon moves to 102.4T. The second-generation Alaska A 1.6T AEC DSP moves to a 3nm process and pushes active electrical cable reach past six meters, doubling the first generation’s reach, in a power-efficient 12.8W 12mm × 14mm package with a known-good-die option for dense AEC assemblies; Marvell cites 8W of power savings versus 5nm designs, and the part gears across 1.6T / 800G / 400G / 200G / 100G / 50G. Both parts also plug into Marvell’s RELIANT interconnect telemetry platform. Amphenol and Molex, which build the actual cables and backplanes, echoed support in the same release.
We believe two signals in these announcements matter more than any single spec. First, Marvell put inference memory on a cadence: the first generation already ships to hyperscalers, the second generation samples in Q1 2027, and the upgrade path covers both DDR4 reuse and DDR5 growth — which matters because memory is the tightest line item in inference bills of materials, and DDR4 remains in shortage. Second, the connectivity parts show scale-up standardizing quickly: one retimer now speaks Ethernet, UALink, and ESUN in the same silicon, and AEC reach doubling past six meters suggests AI racks are being wired like scale-out networks rather than shelf wiring. We also note Marvell’s investor day set out a $400B company TAM by 2030 backed by nearly $3T of AI capex, with AI networking above $1T in the early 2030s and scale-up passing $100B by 2030 — the memory and connectivity refresh aligns to that spending plan.
The ecosystem surround is broad. Structera X carries support statements from AMD, Arm, Meta, and Alibaba — the Meta quote was added in an updated release — and the connectivity parts carry AMD’s UALink board chair alongside Amphenol and Molex. Structera X also adds StructGuard RAS, Caliptra 2.0, CXL IDE, AES-256 memory encryption, and what Marvell describes as industry-first post-quantum security. Nvidia and Cisco used the same show to announce a new pluggable optics form factor for AI factories, so the show’s interconnect theme runs through memory, copper, and optics.
650 Group researches several of the technologies we covered in this blog, including Data Center, Co-Location, and Cloud, Enterprise, and more.
